Nanotechnology research centre imec has taped out what it says is the industry’s first 3nm test chip. The project, in association with Cadence, was completed using design rules focused at EUV and 193nm immersion lithography, along with Cadence’s Innovus and Genus software suites.. The tape out leads they way into a new chip area.
Nanotechnology research centre imec has taped out what it says is the industry’s first 3nm test chip. The project in association with Cadence, was completed using design rules focused at EUV and the latest 193nm immersion lithography, along with Cadence’s Innovus and Genus software suites.
The test chip was a 64bit CPU was created using a custom 3nm standard cell library and a TRIM metal flow, in which the routing pitch was reduced to 21nm. Together Cadence and imec have enabled the 3nm implementation flow to be fully validated in preparation for next-generation design innovation.
The layout of the interconnect Imec and Cadence assumed a mixture of EUV and 193nm immersion with both lithography technologies using self-aligned spacer patterning supplemented by cut masks. “At a 21nm pitch, it’s not possible to EUV single patterning,” Debacker (Peter Debacker, R&D team leader at Imec).
3 nm facility in Taiwan
TSMC (Taiwan Semiconductor Manufacturing Co.) announced last year that its facilities will be ready to roll out the first 5 nm chips as early as 2020. The schedule appears to be consistent with upcoming CPU releases, since Intel is planning to launch 10 nm chips in 2018, and AMD could be launching the first 7 nm CPU in late 2018 / early 2019.
Numbers are marketing
The chips or the integrated modules are not 3 nm so overall the physically process is somewhat near 180nm~ 200nm, but it’s always good to ‘lie’ because numbers still seems to count for most people.
No CPUs for the market soon
The tape out for 5nm was in 2015 and we still don’t see any 5nm CPU’s because several problems with building a stable chip there was only one Fab which can produce it and other things. Don’t be too optimistic to see any 3nm chips until 2024.
- IMEC (imec-int.com)
- Cadence (cadence.com)
- Imec Presents Patterning Solutions for N5-equivalent Metal Layers (imec-int.com)
- Imec demonstrates Electrically Functional 5nm Solution for Back-End-of-Line (imec-int.com)